Z:\dpp\LinearCollider\LC documents\TPC test lab\readout-Labview-HV-operations\

StruckOperationNotes.doc

ref. Struck FADC Manual, page 50

note: to change configuration values:

change value on LabView “front panel”

from “front panel”, pull down “operate”, select “make current value default”

pull down “file”, select “save”

Configuration: section 6.1

--- “key address general reset” section 4.9, page 27, address: xx_000_020

---issue key reset write data: arbitrary

--- “interrupt configuration register” section 4.3, page 20, address: xx_000_008

power up: 00_00_00_00

---VME IRQ Level and Vector

---type of IRQ requester

Charlie said that, when not using interrupts, set all to 0

--- “interrupt control register” section 4.4, page 21, address: xx_000_00C

power up: 00_00_00_00

---enable IRQ source

--- “acquisition register” section 4.5, page 23, address: xx_000_010

power up: 00_00_00_00

---set clock source page 24

internal, 100MHz, write data: 70_00_00_00

internal, 25MHz optional write data: 00_00_20_00

---set start/stop or gate mode

disable gate mode write data: 04_00_00_00

---enable/disable P2 external start/stop

disable P2 write data: 02_00_00_00

---enable/disable LEMO external start/stop

enable external LEMO write data: 00_00_01_00

---enable/disable external stop delay

enable ext stop delay write data: 00_00_00_80

---enable/disable external start delay

disable ext start delay write data: 00_40_00_00

---enable/disable single or multi event mode

disable multi event write data: 00_20_00_00

---enable/disable autostart (multi event)

--- “event configuration register” section 4.19, page 31, address: xx_100_000

power up: 00_00_1y_00

(where “y” is the number of the channel group)

---enable/disable autostop at end of page

enable wrap around write data: 00_00_00_08

---set page size section 4.19.5, page 33

number of samples is

(60cm)*(microsec/5cm)*(100samples/microsec) = 1200 samples

set for 2K samples: 011 write data: 00_00_00_03

set for 4K samples: 011 optional write data: 00_00_00_02

Note: changing the sample size requires changes to WriteData.VI

and GetData.VI

front->eventloop->processdata

GetData.VI was also changed for the read location

**other registers not described in section 6.1, and not used in readout

--- “control status register” section 4.1, page 17, address: xx_000_000

power up: 00_00_00_00

--- “module ID and firmware” section 4.2, page 19, address: xx_000_004

power up: 31_00_ij_kl

--- “start delay register” section 4.6, page 25, address: xx_000_014

power up: 00_00_00_00

--- “stop delay register” section 4.7, page 25, address: xx_000_018

power up: 00_00_00_00

--- desired stop delay is 1600 sample to center the physical region

7* 256 + 9 * 16 + 14 * 1 =1950 write data: 00_00_ 07_9E

6* 256 + 4 * 16= 1600 optional write data: 00_00_ 06_40

15* 256 + 3 * 16 + 12 * 1 =3900 optional write data: 00_00_ 0F_3C

--- “time stamp predivide register” section 4.8, page 26, address: xx_000_01c

power up: 00_00_00_00

--- “start autobank switch mode” section 4.12, page 28, address: xx_000_040

--- “stop autobank switch mode” section 4.13, page 28, address: xx_000_044

--- “clear BANK1 FULL flag” section 4.14, page 28, address: xx_000_048

--- “clear BANK2 FULL flag” section 4.15, page 28, address: xx_000_04c

--- “event timestamp dir. bank 1” section 4.17, page 30, address: xx_001_000

multievent mode only to xx_001_ffc

--- “event timestamp dir. bank 2” section 4.18, page 30, address: xx_002_000

multievent mode only to xx_002_ffc

--- “threshold register” section 4.20, page 34, address: xx_100_004

power up: 00_0_fff_0_fff

--- “trigger flag clear counter” section 4.21, page 36, address: xx_100_01c

power up: 00_00_00_00

--- “clock predivider ” section 4.22, page 37, address: xx_100_020

multiplexer mode only power up: 00_00_00_00

--- “number of sample register” section 4.23, page 38, address: xx_100_024

multiplexer mode only power up: 00_00_00_00

--- “trigger setup register” section 4.24, page 39, address: xx_100_028

power up: 00_00_00_00

--- “maximum number of events” section 4.25, page 40, address: xx_100_02c

multiplexer mode and gated mode only power up: 00_00_00_00

Arm for Sampling: section 6.2

--- “acquisition register” section 4.5, page 23, address: xx_000_010

power up: 00_00_00_00

---enable sample clock

use memory bank 1 write data: 00_00_00_01

Start Sampling: section 6.3

--- “key address start sampling” section 4.9, page 27, address: xx_000_030

---issue key reset write data: arbitrary

Stop Sampling: section 6.4

--- NIM pulse at LEMO input 2 section 5.1.1, page 47; and section 5.4, page 49

or

--- issue “Key Stop” section 4:11, page 27, address xx_000_034

write data: arbitrary

Recognize End of Sampling: section 6.5

--- “acquisition register” section 4.5, page 23, address: xx_000_010

the “sample clock enable” bit is cleared at the end of sampling (one event)

read from address

test mask: 00_00_00_01

Read-out: pointer to last entry

(do not use this)

--- “Trigger event directory bank 1”section 4.26, page 41, address: xx_101000

-xx_101ffc

read only 4096 bytes/(4bytes/location)=1024 locations

this might be filled in multi event mode only, see section 2.9, page 11

read from address

address mask: 00_00_7F_FF

or

(preferred)

--- “Bank 1 address counter” section 4.30, page 43, address: xx_200008

xx_280008

xx_300008

xx_380008

read only register

the address+1 of the last sample for each ADC group 1/2/3/4

read from address

address mask: 00_00_FF_FF

Read-out: memory

--- “Bank 1 memory” section 4.35, page 46, address: xx_400000

128 K samples each, 4 bytes/sample

ADC 1 2 xx_400000

ADC 3 4 xx_480000

ADC 5 6 xx_500000

ADC 7 8 xx_580000

read from address