Version 4
SHEET 1 4468 1884
WIRE 2880 320 2832 320
WIRE 2880 352 2832 352
WIRE 3008 352 2960 352
WIRE 2320 368 2304 368
WIRE 2528 368 2512 368
WIRE 3424 368 3424 336
WIRE 3424 368 3376 368
WIRE 3456 368 3456 336
WIRE 3504 368 3456 368
WIRE 2880 384 2832 384
WIRE 3008 384 2960 384
WIRE 3376 384 3376 368
WIRE 3504 384 3504 368
WIRE 2320 400 2304 400
WIRE 2528 400 2512 400
WIRE 2880 416 2832 416
WIRE 3008 416 2960 416
WIRE 2320 432 2304 432
WIRE 2528 432 2512 432
WIRE 2880 448 2832 448
WIRE 3008 448 2960 448
WIRE 2320 464 2304 464
WIRE 2528 464 2512 464
WIRE 2880 480 2832 480
WIRE 3008 480 2960 480
WIRE 2320 496 2304 496
WIRE 2528 496 2512 496
WIRE 2880 512 2832 512
WIRE 3008 512 2960 512
WIRE 2320 528 2304 528
WIRE 2528 528 2512 528
WIRE 2880 544 2832 544
WIRE 3008 544 2960 544
WIRE 3360 544 3360 496
WIRE 3360 544 3328 544
WIRE 2320 560 2304 560
WIRE 2528 560 2512 560
WIRE 3008 576 2960 576
WIRE 3392 576 3392 496
WIRE 3392 576 3296 576
WIRE 2320 592 2304 592
WIRE 2528 592 2512 592
WIRE 3488 608 3488 496
WIRE 3488 608 3264 608
WIRE 3520 640 3520 496
WIRE 3520 640 3232 640
FLAG 1712 128 0
FLAG 1712 48 CLK
FLAG 1984 448 X
FLAG 2320 272 0
FLAG 2320 304 CLK
FLAG 2304 368 DX0
FLAG 2304 400 DX1
FLAG 2304 432 DX2
FLAG 2304 464 DX3
FLAG 2304 496 DX4
FLAG 2304 528 DX5
FLAG 2304 560 DX6
FLAG 2304 592 DX7
FLAG 2528 368 QX0
FLAG 2528 400 QX1
FLAG 2528 432 QX2
FLAG 2528 464 QX3
FLAG 2528 496 QX4
FLAG 2528 528 QX5
FLAG 2528 560 QX6
FLAG 2528 592 QX7
FLAG 2832 320 DX0
FLAG 2832 352 DX1
FLAG 2832 384 DX2
FLAG 2832 416 DX3
FLAG 2832 448 DX4
FLAG 2832 480 DX5
FLAG 2832 512 DX6
FLAG 2832 544 DX7
FLAG 3008 352 QX0
FLAG 3008 384 QX1
FLAG 3008 416 QX2
FLAG 3008 448 QX3
FLAG 3008 480 QX4
FLAG 3008 512 QX5
FLAG 3008 544 QX6
FLAG 3008 576 QX7
FLAG 3440 224 DX0
FLAG 3328 544 QX1
FLAG 3296 576 QX2
FLAG 3264 608 QX3
FLAG 3232 640 QX7
FLAG 1856 48 CLK
FLAG 1968 48 _CLK
SYMBOL voltage 1712 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n 0.1m 1m)
SYMBOL dac8 1872 448 R0
SYMATTR InstName X3
SYMBOL 74hc374 2416 208 R0
SYMATTR InstName U1
SYMBOL res 2864 368 R270
WINDOW 0 32 56 Invisible 0
WINDOW 3 0 56 Invisible 0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res 2864 400 R270
WINDOW 0 32 56 Invisible 0
WINDOW 3 0 56 Invisible 0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL res 2864 432 R270
WINDOW 0 32 56 Invisible 0
WINDOW 3 0 56 Invisible 0
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL res 2864 464 R270
WINDOW 0 32 56 Invisible 0
WINDOW 3 0 56 Invisible 0
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL res 2864 496 R270
WINDOW 0 32 56 Invisible 0
WINDOW 3 0 56 Invisible 0
SYMATTR InstName R5
SYMATTR Value 1
SYMBOL res 2864 528 R270
WINDOW 0 32 56 Invisible 0
WINDOW 3 0 56 Invisible 0
SYMATTR InstName R6
SYMATTR Value 1
SYMBOL res 2864 560 R270
WINDOW 0 32 56 Invisible 0
WINDOW 3 0 56 Invisible 0
SYMATTR InstName R7
SYMATTR Value 1
SYMBOL 74hc86 3312 448 R270
SYMATTR InstName U2
SYMBOL 74hc86 3440 448 R270
SYMATTR InstName U3
SYMBOL 74hc86 3376 288 R270
SYMATTR InstName U4
SYMBOL 74hc04 1904 -16 R0
SYMATTR InstName U21
TEXT 1672 192 Left 0 !.tran 0.645
TEXT 1840 192 Left 0 !.include 74HC.LIB
TEXT 2192 120 Left 0 !.ic V(DX0)=5 V(DX1)=0 V(DX2)=0 V(DX3)=0 V(DX4)=0 V(DX5)=0 V(DX6)=0 V(DX7)=0
TEXT 2184 72 Left 0 ;Pseudo-Random Number Generator (RNG)
TEXT 3024 120 Left 0 ;<--- change seed
TEXT 1664 -40 Left 0 ;Clock signal
TEXT 1664 248 Left 0 ;Digital to analog (8-bit)
TEXT 2536 264 Left 0 ;RNG output
TEXT 2200 672 Left 0 ;74HC374 -- octal D flip-flops positive-edge triggered\nYou will find this circuit in a larger (uncompleted) schematic under 'experiments' folder
LINE Normal 2608 464 2608 368
LINE Normal 2624 480 2608 464
LINE Normal 2608 496 2624 480
LINE Normal 2608 592 2608 496
LINE Normal 2576 608 2608 592
LINE Normal 2576 352 2608 368
RECTANGLE Normal 2176 96 3648 736 1
RECTANGLE Normal 2032 -16 1664 160 1
RECTANGLE Normal 2032 736 1664 272 1